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flowing-water-light-code
- 这是一段基于DE2开发板的流水灯Verilog hdl 代码-This is a based on DE2 development board of flowing water light Verilog HDL code
FullAdder
- full adder verilog de2-70
clock2
- 基于Verilog HDL及DE2开发板的数字钟设计，使用Verilog HDL实现-Based on Verilog HDL and DE2 development board of the digital clock design, use Verilog HDL to implement
pingpong
- 使用Verilog HDL 实现了一个桌球游戏，并在DE2开发板上验证通过。-Use Verilog HDL to achieve a table tennis game, and through the verification on the DE2 development board.
Fisheye_Correction_v2
- 基于DE2-115的鱼眼畸变矫正verilog实现，具有拍照即存储照片功能，通过VGA输出实时的矫正后的图像-Based DE2-115 fisheye image distortion correction verilog realized that store photos with a camera function, real-time via the VGA output after correction
paobiao
- verilog实现数码跑表，基于ALTERA DE2—70开发板实现验证，其中代码不分模块。-verilog achieve digital stopwatch, to achieve certification based ALTERA DE2-70 development board, regardless of where the code module.
DE2_70_SD_Card_Audio_Player
- DE2-70 SD card player verilog and nios ii code
niosII_hw_dev_tutorial
- 在DE2开发板上实现的一个简单乒乓球的程序。开发语言-verilog-In the DE2 development board to achieve a simple ping-pong process. Development language verilog
OV7670_FPGA_DE2
- 基于Verilog语言的OV7670摄像头驱动，在DE2-115FPGA开发板上实现，显示还有点小问题-Based on Verilog language OV7670 camera driver, the DE2-115 implementation on fpga development board, shows that there are some small problems
Zet-1.3.1
- 在单片FPGA上实现九十年代初期PC，可安装Windows3.1及其他DOS系统。SOC中包含以80286(cpu),中断控制器,显示控制器(VGA),声音控制器,PS2(鼠标，键盘)等。是了解计算机历史变迁及学习SOC设计的重要资料！(ZET aims to implement an early 90`s PC on FPGA.Which include a 80286(cpu),interrupt controller,display card(VGA),sound card,PS2 int
fdfd
- 第二章 设计思路 2.1 设计总体框图 有分析可知，本次课程设计可以分成五个木块来实现相应的功能，分别是输入模块，计算模块，扫描模块，输出模块以及显示模块。((Calculator design based on FPGA DE2 development board. language use Verilog. Matrix keyboard input, LCD1602 display. Program includes key scanning module and LCD modul